The memory device of the electrically-erasable programmable read-only memory type comprises write circuitry designed to carry out a write operation in response to receiving a command for writing at least one selected byte in at least one selected memory word of the memory plane, the write operation comprising an erase cycle followed by a programming cycle, and configured for generating, during the erase cycle, an erase voltage in the memory cells of all the bytes of the at least one selected memory word, and an erase inhibit potential configured, with respect to the erase voltage, for preventing the erasing of the memory cells of the non-selected bytes of the at least one selected memory word, which are not the at least one selected byte.