- 专利标题: Passivation structuring and plating for semiconductor devices
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申请号: US16999308申请日: 2020-08-21
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公开(公告)号: US11387095B2公开(公告)日: 2022-07-12
- 发明人: Ravi Keshav Joshi , Andreas Behrendt , Richard Gaisberger , Anita Satz , Johanna Schlaminger , Johann Schmid , Mario Stanovnik , Juergen Steinbrenner
- 申请人: Infineon Technologies Austria AG
- 申请人地址: AT Villach
- 专利权人: Infineon Technologies Austria AG
- 当前专利权人: Infineon Technologies Austria AG
- 当前专利权人地址: AT Villach
- 代理机构: Murphy, Bilak & Homiller, PLLC
- 主分类号: H01L21/02
- IPC分类号: H01L21/02 ; H01L21/768 ; H01L23/528 ; H01L21/306 ; H01L21/3213
摘要:
Described herein is a method and a power semiconductor device produced by the method. The method includes: forming a structured metallization layer above a semiconductor substrate; forming a protective layer on the structured metallization layer; forming a first passivation over the structured metallization layer with the protective layer interposed between the first passivation and the structured metallization layer; structuring the first passivation to expose one or more regions of the protective layer; removing the one or more exposed regions of the protective layer to expose one or more parts of the structured metallization layer; and after structuring the first passivation and removing the one or more exposed regions of the protective layer, forming a second passivation on the first passivation and electroless plating the one or more exposed parts of the structured metallization layer.
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