公开(公告)号：US11387095B2

公开(公告)日：2022-07-12

申请号：US16999308

申请日：2020-08-21

申请人： Infineon Technologies Austria AG

发明人： Ravi Keshav Joshi ,  Andreas Behrendt ,  Richard Gaisberger ,  Anita Satz ,  Johanna Schlaminger ,  Johann Schmid ,  Mario Stanovnik ,  Juergen Steinbrenner

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L23/528 ,  H01L21/306 ,  H01L21/3213

摘要： Described herein is a method and a power semiconductor device produced by the method. The method includes: forming a structured metallization layer above a semiconductor substrate; forming a protective layer on the structured metallization layer; forming a first passivation over the structured metallization layer with the protective layer interposed between the first passivation and the structured metallization layer; structuring the first passivation to expose one or more regions of the protective layer; removing the one or more exposed regions of the protective layer to expose one or more parts of the structured metallization layer; and after structuring the first passivation and removing the one or more exposed regions of the protective layer, forming a second passivation on the first passivation and electroless plating the one or more exposed parts of the structured metallization layer.

公开(公告)号：US11501979B1

公开(公告)日：2022-11-15

申请号：US17350345

申请日：2021-06-17

申请人： Infineon Technologies Austria AG

发明人： Markus Beninger-Bina ,  Andreas Behrendt ,  Mark Harrison ,  Robert Hartl ,  Peter Imrich ,  Reinhard Lindner ,  Evelyn Napetschnig

IPC分类号： H01L21/48 ,  H01L21/20 ,  H01L21/28

摘要： A semiconductor device and a method of producing the semiconductor device are described. The semiconductor device includes: a semiconductor substrate; a metallization layer over the semiconductor substrate; a plating over the metallization layer, the plating including NiP; a passivation over the metallization layer and laterally adjacent the plating such that a surface of the plating that faces away from the semiconductor substrate is uncovered by the passivation, wherein a seam is present along an interface between the passivation and the plating; and a structure that covers the seam along a periphery of the plating and delimits a bondable area for the plating. The structure extends from the periphery of the plating onto the passivation. The structure includes an imide having a curing temperature below a recrystallization temperature of the NiP or an oxide having a deposition temperature below the recrystallization temperature of the NiP.

公开(公告)号：US20220059347A1

公开(公告)日：2022-02-24

申请号：US16999308

申请日：2020-08-21

申请人： Infineon Technologies Austria AG

发明人： Ravi Keshav Joshi ,  Andreas Behrendt ,  Richard Gaisberger ,  Anita Satz ,  Johanna Schlaminger ,  Johann Schmid ,  Mario Stanovnik ,  Juergen Steinbrenner

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L21/3213 ,  H01L21/306 ,  H01L23/528

摘要： Described herein is a method and a power semiconductor device produced by the method. The method includes: forming a structured metallization layer above a semiconductor substrate; forming a protective layer on the structured metallization layer; forming a first passivation over the structured metallization layer with the protective layer interposed between the first passivation and the structured metallization layer; structuring the first passivation to expose one or more regions of the protective layer; removing the one or more exposed regions of the protective layer to expose one or more parts of the structured metallization layer; and after structuring the first passivation and removing the one or more exposed regions of the protective layer, forming a second passivation on the first passivation and electroless plating the one or more exposed parts of the structured metallization layer.

公开(公告)号：US20220285149A1

公开(公告)日：2022-09-08

申请号：US17825043

申请日：2022-05-26

申请人： Infineon Technologies Austria AG

发明人： Ravi Keshav Joshi ,  Andreas Behrendt ,  Richard Gaisberger ,  Anita Satz ,  Johanna Schlaminger ,  Johann Schmid ,  Mario Stanovnik ,  Juergen Steinbrenner

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L23/528 ,  H01L21/306 ,  H01L21/3213

摘要： Described herein are a method and a power semiconductor device produced by the method. The power semiconductor device includes: transistor device structures formed in a semiconductor substrate; a structured metallization layer above the semiconductor substrate; a first passivation over the structured metallization layer; a second passivation on the first passivation; an opening in the first passivation and the second passivation such that a first part of the structured metallization layer has a contact region uncovered by the first passivation and the second passivation and a peripheral region laterally surrounding the contact region and covered by the first passivation and the second passivation; a plating that covers the contact region but not the peripheral region of the first part of the structured metallization layer; and a protective layer separating the peripheral region of the first part of the structured metallization layer from the first passivation.