Invention Grant
- Patent Title: Chip package and manufacturing method thereof
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Application No.: US17023199Application Date: 2020-09-16
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Publication No.: US11387201B2Publication Date: 2022-07-12
- Inventor: Po-Han Lee , Chia-Ming Cheng , Jiun-Yen Lai , Ming-Chung Chung , Wei-Luen Suen
- Applicant: XINTEC INC.
- Applicant Address: TW Taoyuan
- Assignee: XINTEC INC.
- Current Assignee: XINTEC INC.
- Current Assignee Address: TW Taoyuan
- Agency: Liu & Liu
- Main IPC: H01L23/66
- IPC: H01L23/66 ; H01L23/00 ; H01L23/552 ; H01L21/3213

Abstract:
A chip package includes a semiconductor substrate, a supporting element, an antenna layer, and a redistribution layer. The semiconductor substrate has an inclined sidewall and a conductive pad that protrudes from the inclined sidewall. The supporting element is located on the semiconductor substrate, and has a top surface facing away from the semiconductor substrate, and has an inclined sidewall adjoining the top surface. The antenna layer is located on the top surface of the supporting element. The redistribution layer is located on the inclined sidewall of the supporting element, and is in contact with a sidewall of the conductive pad and an end of the antenna.
Public/Granted literature
- US20210082841A1 CHIP PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-03-18
Information query
IPC分类: