Invention Grant
- Patent Title: Method of manufacturing semiconductor device
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Application No.: US17148923Application Date: 2021-01-14
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Publication No.: US11456264B2Publication Date: 2022-09-27
- Inventor: Yoshiaki Sato , Mitsunobu Wansawa , Akira Matsumoto , Yoshinori Deguchi , Kentaro Saito
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JPJP2020-031649 20200227
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L21/48 ; G11C16/04 ; H01L21/66

Abstract:
In a method of manufacturing a semiconductor device according to one embodiment, after a semiconductor wafer including a non-volatile memory, a bonding pad and an insulating film comprised of an organic material is provided, a probe needle is contacted to a surface of the bonding pad located in a second region, and a data is written to the non-volatile memory. Here, the insulating film is formed by performing a first heat treatment to the organic material. Also, after a second heat treatment is performed to the semiconductor wafer, and the non-volatile memory to which the data is written is checked, a barrier layer and a first solder material are formed on the surface of the bonding pad located in a first region by using an electroplating method. Further, a bump electrode is formed in the first region by performing a third heat treatment to the first solder material.
Public/Granted literature
- US20210272917A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2021-09-02
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