Invention Grant
- Patent Title: Stacked thin film transistors
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Application No.: US16016387Application Date: 2018-06-22
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Publication No.: US11462568B2Publication Date: 2022-10-04
- Inventor: Aaron Lilak , Justin Weber , Harold Kennel , Willy Rachmady , Gilbert Dewey , Van H. Le , Abhishek Sharma , Patrick Morrow , Ashish Agrawal
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L21/8256 ; H01L29/78 ; H01L29/786

Abstract:
Embodiments herein describe techniques for a semiconductor device including a first transistor above a substrate, an insulator layer above the first transistor, and a second transistor above the insulator layer. The first transistor includes a first channel layer above the substrate, and a first gate electrode above the first channel layer. The insulator layer is next to a first source electrode of the first transistor above the first channel layer, next to a first drain electrode of the first transistor above the first channel layer, and above the first gate electrode. The second transistor includes a second channel layer above the insulator layer, and a second gate electrode separated from the second channel layer by a gate dielectric layer. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20190393249A1 STACKED THIN FILM TRANSISTORS Public/Granted day:2019-12-26
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