Invention Grant
- Patent Title: Semicondutor packages and methods of forming same
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Application No.: US17065265Application Date: 2020-10-07
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Publication No.: US11495472B2Publication Date: 2022-11-08
- Inventor: Chung-Yu Lu , Ping-Kang Huang , Sao-Ling Chiu , Shang-Yun Hou
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L21/48
- IPC: H01L21/48 ; H01L23/00 ; H01L23/538 ; H01L25/065 ; H01L25/18 ; H01L25/00 ; H01L23/498 ; H01L21/56

Abstract:
One embodiment includes partially forming a first through via in a substrate of an interposer, the first through via extending into a first side of the substrate of the interposer. The method also includes bonding a first die to the first side of the substrate of the interposer. The method also includes recessing a second side of the substrate of the interposer to expose the first through via, the first through via protruding from the second side of the substrate of the interposer, where after the recessing, the substrate of the interposer is less than 50 μm thick. The method also includes and forming a first set of conductive bumps on the second side of the substrate of the interposer, at least one of the first set of conductive bumps being electrically coupled to the exposed first through via.
Public/Granted literature
- US20210327723A1 SEMICONDUTOR PACKAGES AND METHODS OF FORMING SAME Public/Granted day:2021-10-21
Information query
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