Invention Grant
- Patent Title: Power distribution for stacked memory
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Application No.: US17221498Application Date: 2021-04-02
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Publication No.: US11532349B2Publication Date: 2022-12-20
- Inventor: Anthony D. Veches , Brian P. Callaway
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Holland & Hart LLP
- Main IPC: G11C11/40
- IPC: G11C11/40 ; G11C11/4074 ; H01L25/065 ; H01L25/00 ; H01L23/00 ; H01L23/525 ; G11C11/22 ; G06F13/16

Abstract:
Methods, systems, and devices for power distribution for stacked memory are described. A memory die may be configured with one or more conductive paths for providing power to another memory die, where each conductive path may pass through the memory die but may be electrically isolated from circuitry for operating the memory die. Each conductive path may provide an electronic coupling between at least one of a first set of contacts of the memory die (e.g., couplable with a power source) and at least one of a second set of contacts of the memory die (e.g., couplable with another memory die). To support operations of the memory die, a contact of the first set may be coupled with circuitry for operating a memory array of the memory die, and to support operations of another memory die, another contact of the first set may be electrically isolated from the circuitry.
Public/Granted literature
- US20220319569A1 POWER DISTRIBUTION FOR STACKED MEMORY Public/Granted day:2022-10-06
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