Invention Grant
- Patent Title: Multilayer electronic component
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Application No.: US16909097Application Date: 2020-06-23
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Publication No.: US11551869B2Publication Date: 2023-01-10
- Inventor: Hideyuki Hashimoto , Kenji Ueno
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Nagaokakyo
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Nagaokakyo
- Agency: ArentFox Schiff LLP
- Priority: JPJP2019-121512 20190628,JPJP2020-089480 20200522
- Main IPC: H01G4/008
- IPC: H01G4/008 ; H01G4/12 ; H01G4/30

Abstract:
A multilayer electronic component that includes a plurality of stacked dielectric layers, each of the plurality of stacked dielectric layers having a plurality of crystal grains, at least some of the plurality of crystal grains having a trap portion therein, and at least one element selected from the group consisting of Ni, Cu, Pt, Sn, Pd and Ag is present locally in the trap portion; and a plurality of internal electrode layers arranged between adjacent dielectric layers of the plurality of stacked dielectric layers.
Public/Granted literature
- US11594373B2 Multilayer electronic component Public/Granted day:2023-02-28
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