Invention Grant
- Patent Title: Scan chain self-testing of lockstep cores on reset
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Application No.: US17093702Application Date: 2020-11-10
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Publication No.: US11555853B2Publication Date: 2023-01-17
- Inventor: Prakash Narayanan , Nikita Naresh
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Krista Y. Chan; Frank D. Cimino
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3177 ; G01R31/317

Abstract:
A system is provided that includes a memory configured to store test patterns. A first lockstep core and a second lockstep core are configured to receive the same set of test patterns. First scan outputs are generated from the first lockstep core, and second scan outputs are generated from the second lockstep core during a reset of the first lockstep core and the second lockstep core. A comparator can be coupled to the first lockstep core and the second lockstep core and is configured to compare the first scan outputs to the second scan outputs. The first and second lockstep cores can be initialized to a similar state if the first and second scan outputs are the same. The first and second lockstep cores can comprise non-resettable flip flops.
Public/Granted literature
- US20210055345A1 SCAN CHAIN SELF-TESTING OF LOCKSTEP CORES ON RESET Public/Granted day:2021-02-25
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