Invention Grant
- Patent Title: Package and manufacturing method thereof
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Application No.: US16801171Application Date: 2020-02-26
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Publication No.: US11557568B2Publication Date: 2023-01-17
- Inventor: Chih-Wei Wu , Szu-Wei Lu , Ying-Ching Shih
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: JCIPRNET
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L23/31 ; H01L23/00 ; H01L23/538 ; H01L21/56 ; H01L25/00 ; H01L21/48 ; H01L23/48

Abstract:
A package includes at least one memory component and an insulating encapsulation. The at least one memory component includes a stacked memory structure and a plurality of conductive posts. The stacked memory structure is laterally encapsulated in a molding compound. The conductive posts are disposed on an upper surface of the stacked memory structure. The upper surface of the stacked memory structure is exposed from the molding compound. The insulating encapsulation encapsulates the at least one memory component. The top surfaces of the conductive posts are exposed form the insulating encapsulation. A material of the molding compound is different a material of the insulating encapsulation.
Public/Granted literature
- US20210265306A1 PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2021-08-26
Information query
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