- Patent Title: Sidelink collision avoidance, HARQ feedback, and CSI acquisition
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Application No.: US17253018Application Date: 2019-11-01
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Publication No.: US11570757B2Publication Date: 2023-01-31
- Inventor: Sergey Panteleev , Alexey Khoryaev , Mikhail Shilov , Kilian Peter Anton Roth
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- International Application: PCT/US2019/059449 WO 20191101
- International Announcement: WO2020/092939 WO 20200507
- Main IPC: H04W72/02
- IPC: H04W72/02 ; H04W76/11 ; H04W4/40 ; H04L1/18 ; H04L5/00 ; H04W28/02 ; H04W28/26 ; H04W72/04

Abstract:
A computer-readable storage medium that stores instructions for execution by one or more processors of a user equipment (UE). configure the UE for NR communication. The instructions cause the UE to decode sidelink control information (SCI). The SCI includes scheduling information and priority information. The scheduling information indicates time resource assignment and frequency resource assignment for sidelink data communications using a physical sidelink shared channel (PSSCH). The instructions further cause the UE to detect that a transmission (Tx) of a first set of physical sidelink feedback channels (PSFCHs) would overlap in time with a reception (Rx) of a second set of PSFCHs. The first and second sets of PSFCHs include sidelink feedback control information for the sidelink data communications. The instructions further cause transmission of at least one PSFCH from the first set of PSFCHs or the second set of PSFCHs based on the priority information.
Public/Granted literature
- US20210127364A1 SIDELINK COLLISION AVOIDANCE, HARQ FEEDBACK, AND CSI ACQUISITION Public/Granted day:2021-04-29
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