Invention Grant
- Patent Title: Stress tuned stiffeners for micro electronics package warpage control
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Application No.: US16447835Application Date: 2019-06-20
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Publication No.: US11581231B2Publication Date: 2023-02-14
- Inventor: Chan H. Yoo , Mark E. Tuttle
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Perkins Coie LLP
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/00 ; H01L21/66 ; H01L23/18 ; H01L23/373 ; H01L23/16

Abstract:
A semiconductor device assembly including a substrate, a semiconductor device, a stiffener member, and mold compound. The stiffener member is tuned, or configured, to reduce and/or control the shape of warpage of the semiconductor device assembly at an elevated temperature. The stiffener member may be placed on the substrate, on the semiconductor device, and/or on the mold compound. A plurality of stiffener members may be used. The stiffener members may be positioned in a predetermined pattern on a component of the semiconductor device assembly. A stiffener member may be used so that the warpage of a first semiconductor device substantially corresponds to the warpage of a second semiconductor device at an elevated temperature. The stiffener member may be tuned by providing the member with a desired coefficient of thermal expansion (CTE). The desired CTE may be based on the individual CTEs of the components of a semiconductor device assembly.
Public/Granted literature
- US20190304860A1 Stress Tuned Stiffeners for Micro Electronics Package Warpage Control Public/Granted day:2019-10-03
Information query
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