Invention Grant
- Patent Title: Methods of testing nonvolatile memory devices
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Application No.: US17509678Application Date: 2021-10-25
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Publication No.: US11600350B2Publication Date: 2023-03-07
- Inventor: Seungbum Kim , Kyoman Kang
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Volentine, Whitt & Francos, PLLC
- Priority: KR10-2021-0060475 20210511
- Main IPC: G11C29/14
- IPC: G11C29/14 ; G11C29/12 ; G11C29/46 ; G11C7/06 ; G11C7/10

Abstract:
In a method of testing a nonvolatile memory device including a first semiconductor layer in which and a second semiconductor layer is formed prior to the first semiconductor layer, circuit elements including a page buffer circuit are provided in the second semiconductor layer, an on state of nonvolatile memory cells which are not connected to the page buffer circuit is mimicked by providing a conducting path between an internal node of a bit-line connection circuit connected between a sensing node and a bit-line node of the page buffer circuit and a voltage terminal to receive a first voltage, a sensing and latching operation with the on state being mimicked is performed in the page buffer circuit and a determination is made as to whether the page buffer circuit operates normally is made based on a result of the sensing and latching operation.
Public/Granted literature
- US20220366993A1 METHODS OF TESTING NONVOLATILE MEMORY DEVICES Public/Granted day:2022-11-17
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