Invention Grant
- Patent Title: Methods for etching metal interconnect layers
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Application No.: US16383176Application Date: 2019-04-12
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Publication No.: US11605587B2Publication Date: 2023-03-14
- Inventor: Poornika Fernandes , Bhaskar Srinivasan , Scott William Jessen , Guruvayurappan S. Mathur
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Frank D. Cimino
- Main IPC: H01L23/522
- IPC: H01L23/522 ; H01L49/02 ; H01L21/02 ; H01L21/3213 ; H01L21/311

Abstract:
In some examples, a method comprises: obtaining a substrate having at a metal interconnect layer deposited over the substrate; forming a first dielectric layer on the metal interconnect layer; forming a second dielectric layer on the first dielectric layer; forming a capacitor metal layer on the second dielectric layer; patterning and etching the capacitor metal layer and the second dielectric layer to the first dielectric layer to leave a portion of the capacitor metal layer and the second dielectric layer on the first dielectric layer; forming an anti-reflective coating to cover the portion of the capacitor metal layer and the second dielectric layer, and to cover the metal interconnect layer; and patterning the metal interconnect layer to form a first metal layer and a second metal layer.
Public/Granted literature
- US20200328149A1 METHODS FOR ETCHING METAL INTERCONNECT LAYERS Public/Granted day:2020-10-15
Information query
IPC分类: