- 专利标题： Via structures of passive semiconductor devices
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申请号： US17027661申请日： 2020-09-21
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公开(公告)号： US11610837B2公开(公告)日： 2023-03-21
- 发明人: Xuesong Rao , Benfu Lin , Bo Li , Chengang Feng , Yudi Setiawan , Yun Ling Tan
- 申请人： GLOBALFOUNDRIES Singapore Pte. Ltd.
- 申请人地址： SG Singapore
- 专利权人： GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人： GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人地址： SG Singapore
- 代理商 Anthony Canale
- 主分类号： H01L23/522
- IPC分类号： H01L23/522 ; H01L23/532 ; H01L21/768
摘要：
A semiconductor device is provided, which includes a dielectric layer and a via structure. The dielectric layer is arranged over a substrate. The via structure is arranged in the dielectric layer, the via structure having a peripheral portion and a central portion. The peripheral portion of the via structure has a height that is greater than that of the central portion.
公开/授权文献
- US20220093508A1 VIA STRUCTURES OF PASSIVE SEMICONDUCTOR DEVICES 公开/授权日：2022-03-24
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