Invention Grant
- Patent Title: Forming ESD devices using multi-gate compatible processes
-
Application No.: US17224671Application Date: 2021-04-07
-
Publication No.: US11637099B2Publication Date: 2023-04-25
- Inventor: Chih-Hung Wang , Ming-Shuan Li , Chih Chieh Yeh , Zi-Ang Su , Chia-Ju Chou
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L29/423 ; H01L29/66 ; H01L21/8234 ; H01L29/786

Abstract:
The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a structure having a frontside and a backside, the structure including a substrate and a stack of a first type and a second type epitaxial layers having different material compositions alternatively stacked above the substrate, wherein the stack is at the frontside of the structure and the substrate is at the backside of the structure; patterning the stack, thereby forming a fin above the substrate; implanting a first dopant into a first region of the fin, the first dopant having a first conductivity type; implanting a second dopant into a second region of the fin, the second dopant having a second conductivity type opposite the first conductivity type; and forming a first contact on the first region and a second contact on the second region.
Public/Granted literature
- US20210391320A1 Forming ESD Devices Using Multi-Gate Compatible Processes Public/Granted day:2021-12-16
Information query
IPC分类: