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公开(公告)号:US20240258301A1
公开(公告)日:2024-08-01
申请号:US18623294
申请日:2024-04-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Wang , Ming-Shuan Li , Chih Chieh Yeh , Zi-Ang Su , Chia-Ju Chou
IPC: H01L27/02 , H01L21/8234 , H01L29/423 , H01L29/66 , H01L29/786
CPC classification number: H01L27/0266 , H01L21/823412 , H01L21/823431 , H01L21/823437 , H01L27/0296 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/78696
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate and an epitaxial stack disposed above the semiconductor substrate. The epitaxial stack includes first and second type epitaxial layers, the first and second type epitaxial layers having different material compositions. The first and second type epitaxial layers are alternatingly disposed in a vertical direction. The semiconductor device also includes a first doped region in the epitaxial stack and a second doped region in the epitaxial stack. The first doped region has a first dopant of a first conductivity type. The second doped region has a second dopant of a second conductivity type opposite the first conductivity type. The semiconductor device also includes first and second gate stacks disposed above the epitaxial stack. A portion of the first doped region and a portion of the second doped region are between the first and second gate stacks.
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公开(公告)号:US11532607B2
公开(公告)日:2022-12-20
申请号:US16996986
申请日:2020-08-19
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Chia Hsu , Tung-Heng Hsieh , Yung-Feng Chang , Bao-Ru Young , Jam-Wem Lee , Chih-Hung Wang
IPC: H01L27/02 , H01L29/06 , H01L29/861
Abstract: Electrostatic discharge (ESD) structures are provided. An ESD structure includes a semiconductor substrate, a first epitaxy region with a first type of conductivity over the semiconductor substrate, a second epitaxy region with a second type of conductivity over the semiconductor substrate, and a plurality of first semiconductor layers and a plurality of second semiconductor layers. The first semiconductor layers and the second semiconductor layers are alternatingly stacked over the semiconductor substrate and between the first and second epitaxy regions. Each of the first and second semiconductor layers has a first side contacting the first epitaxy region and a second side contacting the second epitaxy region, and the first side is opposite the second side.
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公开(公告)号:US20210391320A1
公开(公告)日:2021-12-16
申请号:US17224671
申请日:2021-04-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Wang , Ming-Shuan Li , Chih Chieh Yeh , Zi-Ang Su , Chia-Ju Chou
IPC: H01L27/02 , H01L29/423 , H01L29/786 , H01L21/8234 , H01L29/66
Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a structure having a frontside and a backside, the structure including a substrate and a stack of a first type and a second type epitaxial layers having different material compositions alternatively stacked above the substrate, wherein the stack is at the frontside of the structure and the substrate is at the backside of the structure; patterning the stack, thereby forming a fin above the substrate; implanting a first dopant into a first region of the fin, the first dopant having a first conductivity type; implanting a second dopant into a second region of the fin, the second dopant having a second conductivity type opposite the first conductivity type; and forming a first contact on the first region and a second contact on the second region.
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公开(公告)号:US11948936B2
公开(公告)日:2024-04-02
申请号:US18305556
申请日:2023-04-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Wang , Chih Chieh Yeh , Zi-Ang Su , Chia-Ju Chou , Ming-Shuan Li
IPC: H01L27/02 , H01L21/8234 , H01L29/423 , H01L29/66 , H01L29/786
CPC classification number: H01L27/0266 , H01L21/823412 , H01L21/823431 , H01L21/823437 , H01L27/0296 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/78696
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a fin disposed in a first region of the semiconductor device, channel members disposed in a second region of the semiconductor device and stacked in a vertical direction, first and second metal gates disposed on a top surface of the fin, a third metal gate wrapping around each of the channel members, a first implant region in the fin with a first conductivity type, and a second implant region in the fin with a second conductivity opposite the first conductivity type. The fin includes first and second type epitaxial layers alternatingly disposed in the vertical direction. The first and second type epitaxial layers have different material compositions. The first type epitaxial layers and the channel members have the same material composition.
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公开(公告)号:US20230268337A1
公开(公告)日:2023-08-24
申请号:US18305556
申请日:2023-04-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Wang , Chih Chieh Yeh , Zi-Ang Su , Chia-Ju Chou , Ming-Shuan Li
IPC: H01L27/02 , H01L29/423 , H01L29/66 , H01L21/8234 , H01L29/786
CPC classification number: H01L27/0266 , H01L21/823412 , H01L21/823431 , H01L21/823437 , H01L27/0296 , H01L29/42392 , H01L29/66545 , H01L29/66795 , H01L29/78696
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a fin disposed in a first region of the semiconductor device, channel members disposed in a second region of the semiconductor device and stacked in a vertical direction, first and second metal gates disposed on a top surface of the fin, a third metal gate wrapping around each of the channel members, a first implant region in the fin with a first conductivity type, and a second implant region in the fin with a second conductivity opposite the first conductivity type. The fin includes first and second type epitaxial layers alternatingly disposed in the vertical direction. The first and second type epitaxial layers have different material compositions. The first type epitaxial layers and the channel members have the same material composition.
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公开(公告)号:US11637099B2
公开(公告)日:2023-04-25
申请号:US17224671
申请日:2021-04-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hung Wang , Ming-Shuan Li , Chih Chieh Yeh , Zi-Ang Su , Chia-Ju Chou
IPC: H01L27/02 , H01L29/423 , H01L29/66 , H01L21/8234 , H01L29/786
Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a structure having a frontside and a backside, the structure including a substrate and a stack of a first type and a second type epitaxial layers having different material compositions alternatively stacked above the substrate, wherein the stack is at the frontside of the structure and the substrate is at the backside of the structure; patterning the stack, thereby forming a fin above the substrate; implanting a first dopant into a first region of the fin, the first dopant having a first conductivity type; implanting a second dopant into a second region of the fin, the second dopant having a second conductivity type opposite the first conductivity type; and forming a first contact on the first region and a second contact on the second region.
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