公开(公告)号：US11843038B2

公开(公告)日：2023-12-12

申请号：US17589180

申请日：2022-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Shuan Li ,  Zi-Ang Su ,  Ying-Keung Leung

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L29/73 ,  H01L29/423

CPC classification number: H01L29/41708 ,  H01L29/42304 ,  H01L29/6681 ,  H01L29/66234 ,  H01L29/73 ,  H01L29/785

Abstract: Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins. A first gate structure is disposed over the first set of fins adjacent to the emitter. A second gate structure is disposed over the second set of fins adjacent to the base. A third gate structure is disposed over the third set of fins adjacent to the collector. The first gate structure, second gate structure, and third gate structure are physically and electrically separated.

公开(公告)号：US11948936B2

公开(公告)日：2024-04-02

申请号：US18305556

申请日：2023-04-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hung Wang ,  Chih Chieh Yeh ,  Zi-Ang Su ,  Chia-Ju Chou ,  Ming-Shuan Li

IPC: H01L27/02 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/0266 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0296 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/78696

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a fin disposed in a first region of the semiconductor device, channel members disposed in a second region of the semiconductor device and stacked in a vertical direction, first and second metal gates disposed on a top surface of the fin, a third metal gate wrapping around each of the channel members, a first implant region in the fin with a first conductivity type, and a second implant region in the fin with a second conductivity opposite the first conductivity type. The fin includes first and second type epitaxial layers alternatingly disposed in the vertical direction. The first and second type epitaxial layers have different material compositions. The first type epitaxial layers and the channel members have the same material composition.

公开(公告)号：US20240258301A1

公开(公告)日：2024-08-01

申请号：US18623294

申请日：2024-04-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hung Wang ,  Ming-Shuan Li ,  Chih Chieh Yeh ,  Zi-Ang Su ,  Chia-Ju Chou

IPC: H01L27/02 ,  H01L21/8234 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/0266 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0296 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/78696

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a semiconductor substrate and an epitaxial stack disposed above the semiconductor substrate. The epitaxial stack includes first and second type epitaxial layers, the first and second type epitaxial layers having different material compositions. The first and second type epitaxial layers are alternatingly disposed in a vertical direction. The semiconductor device also includes a first doped region in the epitaxial stack and a second doped region in the epitaxial stack. The first doped region has a first dopant of a first conductivity type. The second doped region has a second dopant of a second conductivity type opposite the first conductivity type. The semiconductor device also includes first and second gate stacks disposed above the epitaxial stack. A portion of the first doped region and a portion of the second doped region are between the first and second gate stacks.

公开(公告)号：US12051729B2

公开(公告)日：2024-07-30

申请号：US18366834

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Shuan Li ,  Zi-Ang Su ,  Ying-Keung Leung

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/73 ,  H01L29/78

CPC classification number: H01L29/41708 ,  H01L29/42304 ,  H01L29/66234 ,  H01L29/6681 ,  H01L29/73 ,  H01L29/785

Abstract: Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins. A first gate structure is disposed over the first set of fins adjacent to the emitter. A second gate structure is disposed over the second set of fins adjacent to the base. A third gate structure is disposed over the third set of fins adjacent to the collector. The first gate structure, second gate structure, and third gate structure are physically and electrically separated.

公开(公告)号：US20230378287A1

公开(公告)日：2023-11-23

申请号：US18366834

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Shuan Li ,  Zi-Ang Su ,  Ying-Keung Leung

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L29/73 ,  H01L29/423

CPC classification number: H01L29/41708 ,  H01L29/785 ,  H01L29/66234 ,  H01L29/73 ,  H01L29/6681 ,  H01L29/42304

Abstract: Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins. A first gate structure is disposed over the first set of fins adjacent to the emitter. A second gate structure is disposed over the second set of fins adjacent to the base. A third gate structure is disposed over the third set of fins adjacent to the collector. The first gate structure, second gate structure, and third gate structure are physically and electrically separated.

公开(公告)号：US20210391320A1

公开(公告)日：2021-12-16

申请号：US17224671

申请日：2021-04-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hung Wang ,  Ming-Shuan Li ,  Chih Chieh Yeh ,  Zi-Ang Su ,  Chia-Ju Chou

IPC: H01L27/02 ,  H01L29/423 ,  H01L29/786 ,  H01L21/8234 ,  H01L29/66

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a structure having a frontside and a backside, the structure including a substrate and a stack of a first type and a second type epitaxial layers having different material compositions alternatively stacked above the substrate, wherein the stack is at the frontside of the structure and the substrate is at the backside of the structure; patterning the stack, thereby forming a fin above the substrate; implanting a first dopant into a first region of the fin, the first dopant having a first conductivity type; implanting a second dopant into a second region of the fin, the second dopant having a second conductivity type opposite the first conductivity type; and forming a first contact on the first region and a second contact on the second region.

公开(公告)号：US20240339508A1

公开(公告)日：2024-10-10

申请号：US18750063

申请日：2024-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Shuan Li ,  Zi-Ang Su ,  Ying-Keung Leung

IPC: H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/73 ,  H01L29/78

CPC classification number: H01L29/41708 ,  H01L29/42304 ,  H01L29/66234 ,  H01L29/6681 ,  H01L29/73 ,  H01L29/785

Abstract: Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins. A first gate structure is disposed over the first set of fins adjacent to the emitter. A second gate structure is disposed over the second set of fins adjacent to the base. A third gate structure is disposed over the third set of fins adjacent to the collector. The first gate structure, second gate structure, and third gate structure are physically and electrically separated.

公开(公告)号：US20230268337A1

公开(公告)日：2023-08-24

申请号：US18305556

申请日：2023-04-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hung Wang ,  Chih Chieh Yeh ,  Zi-Ang Su ,  Chia-Ju Chou ,  Ming-Shuan Li

IPC: H01L27/02 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/786

CPC classification number: H01L27/0266 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L27/0296 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/78696

Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a fin disposed in a first region of the semiconductor device, channel members disposed in a second region of the semiconductor device and stacked in a vertical direction, first and second metal gates disposed on a top surface of the fin, a third metal gate wrapping around each of the channel members, a first implant region in the fin with a first conductivity type, and a second implant region in the fin with a second conductivity opposite the first conductivity type. The fin includes first and second type epitaxial layers alternatingly disposed in the vertical direction. The first and second type epitaxial layers have different material compositions. The first type epitaxial layers and the channel members have the same material composition.

公开(公告)号：US11637099B2

公开(公告)日：2023-04-25

申请号：US17224671

申请日：2021-04-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hung Wang ,  Ming-Shuan Li ,  Chih Chieh Yeh ,  Zi-Ang Su ,  Chia-Ju Chou

IPC: H01L27/02 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234 ,  H01L29/786

Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes providing a structure having a frontside and a backside, the structure including a substrate and a stack of a first type and a second type epitaxial layers having different material compositions alternatively stacked above the substrate, wherein the stack is at the frontside of the structure and the substrate is at the backside of the structure; patterning the stack, thereby forming a fin above the substrate; implanting a first dopant into a first region of the fin, the first dopant having a first conductivity type; implanting a second dopant into a second region of the fin, the second dopant having a second conductivity type opposite the first conductivity type; and forming a first contact on the first region and a second contact on the second region.

公开(公告)号：US20220157953A1

公开(公告)日：2022-05-19

申请号：US17589180

申请日：2022-01-31

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Shuan Li ,  Zi-Ang Su ,  Ying-Keung Leung

IPC: H01L29/417 ,  H01L29/78 ,  H01L29/66 ,  H01L29/73 ,  H01L29/423

Abstract: Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins. A first gate structure is disposed over the first set of fins adjacent to the emitter. A second gate structure is disposed over the second set of fins adjacent to the base. A third gate structure is disposed over the third set of fins adjacent to the collector. The first gate structure, second gate structure, and third gate structure are physically and electrically separated.