Invention Grant
- Patent Title: Methods for pillar connection on frontside and passive device integration on backside of die
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Application No.: US16889432Application Date: 2020-06-01
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Publication No.: US11646310B2Publication Date: 2023-05-09
- Inventor: Terry Alcorn , Daniel Namishia , Fabian Radulescu
- Applicant: Wolfspeed, Inc.
- Applicant Address: US NC Durham
- Assignee: Wolfspeed, Inc.
- Current Assignee: Wolfspeed, Inc.
- Current Assignee Address: US NC Durham
- Agency: Myers Bigel, P.A.
- Main IPC: H01L27/06
- IPC: H01L27/06 ; H01L21/683 ; H01L21/768 ; H01L21/8258 ; H01L23/48 ; H01L23/498 ; H01L23/00

Abstract:
An integrated circuit device includes a radio frequency transistor amplifier die having a first surface, a second surface, a semiconductor layer structure that is between the first and second surfaces and includes a plurality of transistor cells adjacent the first surface, and terminals coupled to the transistor cells. At least one passive electronic component is provided on the second surface of the die and is electrically connected to at least one of the terminals, for example, by at least one conductive via. One or more conductive pillar structures may protrude from the first surface of the die to provide electrical connections to one or more of the terminals.
Public/Granted literature
- US11769768B2 Methods for pillar connection on frontside and passive device integration on backside of die Public/Granted day:2023-09-26
Information query
IPC分类: