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公开(公告)号:US20250169105A1
公开(公告)日:2025-05-22
申请号:US18514038
申请日:2023-11-20
Applicant: Wolfspeed, Inc.
Inventor: Woongsun Kim , Naeem Islam , Madankumar Sampath , Sei-Hyung Ryu
Abstract: A semiconductor device includes a semiconductor layer structure comprising a junction field-effect transistor (JFET) region of a first conductivity type, a well region of a second conductivity type on the JFET region, a source region of the first conductivity type on the well region and a plurality of support shields of the second conductivity type. The support shields are spaced apart from one another in a first direction parallel to an upper surface of the semiconductor layer structure and extend through the source region, the well region and the JFET region. The semiconductor device further includes a trenched gate structure formed in the semiconductor layer structure between a pair of adjacent support shields. Edges of at least two of the JFET region, the well region and the source region are aligned in a second direction perpendicular to the first direction.
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公开(公告)号:US20250149506A1
公开(公告)日:2025-05-08
申请号:US18502911
申请日:2023-11-06
Applicant: WOLFSPEED, INC.
Inventor: Kirill Klein
IPC: H01L25/065 , H01L23/00 , H01L23/495
Abstract: A power package includes a power substrate; one or more power devices arranged on the power substrate; an assembly having a top surface, first sides, and second sides; power contacts; and signal contacts. Additionally, the signal contacts are configured on the top surface, in the top surface, and/or to extend from the top surface. Furthermore, the signal contacts are arranged in a middle section of the top surface between the second sides.
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公开(公告)号:USD1073632S1
公开(公告)日:2025-05-06
申请号:US29780368
申请日:2021-04-23
Applicant: Wolfspeed, Inc.
Designer: Brice McPherson , Brandon Passmore , Roberto M. Schupbach , Jennifer Stabach-Smith
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公开(公告)号:US20250142877A1
公开(公告)日:2025-05-01
申请号:US18493838
申请日:2023-10-25
Applicant: Wolfspeed, Inc.
Inventor: Woongsun Kim , Naeem Islam , Madankumar Sampath , Sei-Hyung Ryu
IPC: H01L29/78 , H01L29/16 , H01L29/423
Abstract: A semiconductor device comprises a silicon carbide based semiconductor layer structure that comprises a drift region having a first conductivity type and an implanted region having a second conductivity type on the drift region. First and second gate trench sections extend into the semiconductor layer structure. A first maximum depth into the semiconductor layer structure of a first portion of the implanted region that is between the first gate trench section and the second gate trench section is different than a second maximum depth into the semiconductor layer structure of a second portion of the implanted region that extends downwardly underneath the first gate trench section.
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公开(公告)号:US20250112211A1
公开(公告)日:2025-04-03
申请号:US18981173
申请日:2024-12-13
Applicant: Wolfspeed, Inc.
Inventor: Brice McPherson , Shashwat Singh , Roberto M. Schupbach
IPC: H01L25/07 , H01L23/00 , H01L23/34 , H01L23/498 , H02M7/00 , H02M7/5387
Abstract: A power module is provided with a substrate, power devices, and a housing. The power devices are mounted on device pads of the substrate and arranged to provide a power circuit having a first input, a second input, and at least one output. First and second power terminals provide first and second inputs for the power circuit. At least one output power terminal provides at least one output. The housing encompasses the substrate, the power devices, and portions of the first and second input power terminals as well as the at least one output power terminal. The first and second input power terminals extend out of a first side of the housing, and the at least one output power terminal extends out of a second side of the housing, the first side being opposite the second side.
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公开(公告)号:US12266721B2
公开(公告)日:2025-04-01
申请号:US17834013
申请日:2022-06-07
Applicant: Wolfspeed, Inc.
Inventor: Jia Guo , Kyle Bothe , Scott Sheppard
IPC: H01L29/778 , H01L29/40 , H01L29/66
Abstract: A transistor device according to some embodiments includes a semiconductor barrier layer, a surface dielectric layer on the semiconductor barrier layer, and a gate on the surface dielectric layer. The surface dielectric layer includes an aperture therein that is laterally spaced apart from the gate. The device includes an interlayer dielectric layer on the surface dielectric layer that extends over the gate and into the aperture in the surface dielectric layer, and a multiple-stepped field plate on the interlayer dielectric layer. The multiple-stepped field plate is laterally spaced apart from the gate. A recessed portion of the multiple-stepped field plate is above the aperture in the surface dielectric layer, and the multiple-stepped field plate includes a first step adjacent the recessed portion of the field plate on a side of the field plate opposite the gate, and a second step adjacent the first step.
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公开(公告)号:US20250089316A1
公开(公告)日:2025-03-13
申请号:US18466487
申请日:2023-09-13
Applicant: Wolfspeed, Inc.
Inventor: Charlotte Elizabeth Jonas , Joohyung Kim , Sei-Hyung Ryu
IPC: H01L29/06 , H01L27/06 , H01L27/092 , H01L29/08 , H01L29/423 , H01L29/78
Abstract: Power semiconductor devices are provided. In one example, the power semiconductor device includes a semiconductor structure includes an active region and an inactive region, the active region includes a plurality of unit cells. The power semiconductor device includes a gate structure, wherein at least a portion of the gate structure is on the inactive region. The power semiconductor device includes a first shunt contact structure at least partially on the inactive region. The power semiconductor device includes a second shunt contact structure at least partially on the inactive region. The power semiconductor device includes a balancing shunt structure at least partially on the inactive region.
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公开(公告)号:US12218202B2
公开(公告)日:2025-02-04
申请号:US17477004
申请日:2021-09-16
Applicant: Wolfspeed, Inc.
Inventor: Evan Jones , Saptha Sriram , Kyle Bothe
IPC: H01L29/778 , H01L29/10
Abstract: A semiconductor device includes a substrate having an upper surface including a recess region, a semiconductor structure on the substrate, a portion of the semiconductor structure within the recess region, and a gate contact, a drain contact, and a source contact on the semiconductor structure. The recess region does not vertically overlap the drain contact or the source contact.
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公开(公告)号:US20250040030A1
公开(公告)日:2025-01-30
申请号:US18782438
申请日:2024-07-24
Applicant: Wolfspeed, Inc.
Inventor: Gérard Bouisse
IPC: H05K1/02
Abstract: Multilayer printed circuit boards are provided. In one example, a multilayer printed circuit board includes at least one metallization layer. The multilayer printed circuit board includes an insulating layer. The multilayer printed circuit board includes an insulating layer. The at least one metallization layer includes a plurality of filling segment structures such that the at least one metallization layer has a metal density of at least about 35%.
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公开(公告)号:US20250038056A1
公开(公告)日:2025-01-30
申请号:US18419128
申请日:2024-01-22
Applicant: Wolfspeed, Inc.
Inventor: Afshin Dadvand , Yusheng Lin
Abstract: Semiconductor packages are provided. In one example, the semiconductor package includes a submount. The semiconductor package further includes a recess in the submount. The recess includes a bottom surface defining a recess plane. The recess further includes at least one stud protrusion extending from the recess plane. The semiconductor package further includes a semiconductor die on the at least one stud protrusion.
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