Invention Grant
- Patent Title: Semiconductor package and method of forming the same
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Application No.: US16927126Application Date: 2020-07-13
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Publication No.: US11652063B2Publication Date: 2023-05-16
- Inventor: Cheng-Hsien Hsieh , Li-Han Hsu , Wei-Cheng Wu , Hsien-Wei Chen , Der-Chyang Yeh , Chi-Hsi Wu , Chen-Hua Yu , Tsung-Shu Lin
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/538
- IPC: H01L23/538 ; H01L21/48 ; H01L25/10 ; H01L25/00 ; H01L23/31 ; H01L23/498 ; H01L21/56

Abstract:
An embodiment is a structure including a first die having an active surface with a first center point, a molding compound at least laterally encapsulating the first die, and a first redistribution layer (RDL) including metallization patterns extending over the first die and the molding compound. A first portion of the metallization patterns of the first RDL extending over a first portion of a boundary of the first die to the molding compound, the first portion of the metallization patterns not extending parallel to a first line, the first line extending from the first center point of the first die to the first portion of the boundary of the first die.
Public/Granted literature
- US20200343193A1 Semiconductor Package and Method of Forming the Same Public/Granted day:2020-10-29
Information query
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