Invention Grant
- Patent Title: Methods and apparatus for reducing switching time of RF FET switching devices
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Application No.: US17492199Application Date: 2021-10-01
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Publication No.: US11671135B2Publication Date: 2023-06-06
- Inventor: Ravindranath D. Shrivastava , Fleming Lam , Payman Shanjani
- Applicant: pSemi Corporation
- Applicant Address: US CA San Diego
- Assignee: PSEMI CORPORATION
- Current Assignee: PSEMI CORPORATION
- Current Assignee Address: US CA San Diego
- Agency: Steinfl + Bruno, LLP
- Main IPC: H04B1/40
- IPC: H04B1/40 ; H03F3/24 ; H03H11/28

Abstract:
An apparatus for reducing switching time of RF FET switching devices is described. A FET switch stack includes a stacked arrangement of FET switches and a plurality of gate feed arrangements, each coupled at a different height of the stacked arrangement. A circuital arrangement with a combination of a series RF FET switch and a shunt RF FET switch, each having a stack of FET switches, is also described. The shunt switch has one or more shunt gate feed arrangements with a number of bypass switches that is less than the number of FET switches in the shunt stack.
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