Invention Grant
- Patent Title: Buried electrical debug access port
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Application No.: US17338450Application Date: 2021-06-03
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Publication No.: US11700696B2Publication Date: 2023-07-11
- Inventor: Florence R. Neumann , Bilal Khalaf , Saeed S. Shojaie
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt P.C.
- The original application number of the division: US15089385 2016.04.01
- Main IPC: H05K1/18
- IPC: H05K1/18 ; H05K3/28 ; G01R31/28

Abstract:
Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.
Public/Granted literature
- US20210298183A1 BURIED ELECTRICAL DEBUG ACCESS PORT Public/Granted day:2021-09-23
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