Invention Grant
- Patent Title: Giga interposer integration through chip-on-wafer-on-substrate
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Application No.: US16881211Application Date: 2020-05-22
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Publication No.: US11728254B2Publication Date: 2023-08-15
- Inventor: Shang-Yun Hou , Hsien-Pin Hu , Sao-Ling Chiu , Wen-Hsin Wei , Ping-Kang Huang , Chih-Ta Shen , Szu-Wei Lu , Ying-Ching Shih , Wen-Chih Chiou , Chi-Hsi Wu , Chen-Hua Yu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L23/00 ; H01L23/31 ; H01L21/56 ; H01L21/48 ; H01L23/538
Abstract:
A semiconductor structure includes a first interposer; a second interposer laterally adjacent to the first interposer, where the second interposer is spaced apart from the first interposer; and a first die attached to a first side of the first interposer and attached to a first side of the second interposer, where the first side of the first interposer and the first side of the second interposer face the first die.
Public/Granted literature
- US20210366814A1 Giga Interposer Integration through Chip-On-Wafer-On-Substrate Public/Granted day:2021-11-25
Information query
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