- Patent Title: Integrated assemblies and methods of forming integrated assemblies
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Application No.: US17867579Application Date: 2022-07-18
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Publication No.: US11728395B2Publication Date: 2023-08-15
- Inventor: Aaron Michael Lowe
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- The original application number of the division: US16940852 2020.07.28
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L21/28 ; G11C11/22 ; G11C5/06 ; H01L29/78 ; H01L27/06 ; H10B12/00 ; H10B53/00

Abstract:
Some embodiments include an integrated transistor having an active region comprising semiconductor material. The active region includes a first source/drain region, a second source/drain region and a channel region between the first and second source/drain regions. A conductive gating structure is operatively proximate the channel region and comprises molybdenum. The integrated transistor may be incorporated into integrated memory, such as, for example, DRAM, FeFET memory, etc. Some embodiments include methods of forming integrated assemblies and devices, such as, for example, integrated transistors, integrated memory, etc.
Public/Granted literature
- US20220352324A1 Integrated Assemblies and Methods of Forming Integrated Assemblies Public/Granted day:2022-11-03
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