A memory device can be configured to direct communication of data from an image sensor to the memory device and/or image signal processing circuitry coupled thereto. The memory device can be configured to receive first signaling indicative of first data from an image sensor via a first port and provide the first signaling from the memory device to image signal processing (ISP) circuitry via a second port. The memory device can be configured to receiving, by the memory device, second signaling indicative of second data from the image sensor while the ISP circuitry operates on the first data. An image processing operation can be performed using logic circuitry of the memory device. Directing communication of data using the memory device can reduce data transfers, reduce resource consumption of an imaging system, and offload workloads from a host device and/or a host processing device, for example.