Invention Grant
- Patent Title: Semiconductor devices and methods of forming semiconductor devices with logic and memory regions insulation layers
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Application No.: US17016416Application Date: 2020-09-10
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Publication No.: US11744085B2Publication Date: 2023-08-29
- Inventor: Benfu Lin , Yi Jiang , Lup San Leong , Juan Boon Tan
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: VIERING JENTSCHURA & PARTNER MBB
- Main IPC: H10B63/00
- IPC: H10B63/00 ; G11C13/00 ; H10N70/20

Abstract:
A semiconductor device includes a first insulating layer; a second insulating layer arranged over the first insulating layer; a memory structure arranged within a memory region and including a resistance changing memory element within the first insulating layer; and a logic structure arranged within a logic region. In the memory region, the first insulating layer may contact the second insulating layer and in the logic region, the semiconductor device may further include a stop layer arranged between the first insulating layer and the second insulating layer.
Public/Granted literature
- US20220077234A1 SEMICONDUCTOR DEVICES AND METHODS OF FORMING SEMICONDUCTOR DEVICES Public/Granted day:2022-03-10
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