Invention Grant
- Patent Title: Capacitor architectures in semiconductor devices
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Application No.: US17578839Application Date: 2022-01-19
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Publication No.: US11791375B2Publication Date: 2023-10-17
- Inventor: Sudipto Naskar , Manish Chandhok , Abhishek A. Sharma , Roman Caudillo , Scott B. Clendenning , Cheyun Lin
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- The original application number of the division: US16828497 2020.03.24
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L49/02 ; H10B12/00

Abstract:
Embodiments herein describe techniques for a semiconductor device including a three dimensional capacitor. The three dimensional capacitor includes a pole, and one or more capacitor units stacked around the pole. A capacitor unit of the one or more capacitor units includes a first electrode surrounding and coupled to the pole, a dielectric layer surrounding the first electrode, and a second electrode surrounding the dielectric layer. Other embodiments may be described and/or claimed.
Public/Granted literature
- US20220140069A1 CAPACITOR ARCHITECTURES IN SEMICONDUCTOR DEVICES Public/Granted day:2022-05-05
Information query
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