Invention Grant
- Patent Title: UART aggregation and JTAG selection circuitry for a multi-solid state drive environment
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Application No.: US17169062Application Date: 2021-02-05
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Publication No.: US11809355B2Publication Date: 2023-11-07
- Inventor: Lock Duc Nguyen , Akshay Ganesh , Priyadarsini Lanka , Ping Zheng , Xiaofang Chen
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK hynix Inc.
- Current Assignee: SK hynix Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: G06F13/38
- IPC: G06F13/38 ; H03K19/173 ; G06F13/40

Abstract:
An adaptor device includes a first interface for coupling to a first processor, a second interface for coupling to a second processor, the second interface being different than the first interface, and a plurality of third interfaces, which are different than either the first interface or the second interface. The plurality of third interfaces are configured for coupling to a corresponding plurality of external devices. The adaptor device is configured to receive, at the first interface, a first signal from the first processor. In response to the first signal, the adaptor device couples through the plurality of third interfaces to the plurality of external devices to enable the first processor substantially concurrent access to the plurality of external devices. The adaptor device is also configured to receive, at the first interface, a second signal from the first processor. In response to the second signal, the adaptor device couples the second processor with a selected one of the plurality of external devices.
Public/Granted literature
- US20220253395A1 UART AGGREGATION AND JTAG SELECTION CIRCUITRY FOR A MULTI-SOLID STATE DRIVE ENVIRONMENT Public/Granted day:2022-08-11
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