A memory device includes a first channel including a first cell array and communicating with a memory controller through a first path, a second channel including a second cell array and communicating with the memory controller through a second path, and an assignment control circuit configured to monitor memory usage of the first and second channels and further assign a storage space of a portion of the second cell array to the first channel when the memory usage of the first cell array exceeds a threshold value. Access to the storage space of the portion of the second cell array assigned to the first channel is performed through the first path.