公开(公告)号：US20210232513A1

公开(公告)日：2021-07-29

申请号：US17229198

申请日：2021-04-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAE-WON PARK ,  Je-Min Ryu ,  Sang-Hoon Shin ,  Jae-Hoon Jung

IPC: G06F13/16 ,  G06F12/06 ,  G06F12/0866

Abstract: A memory device includes a first channel including a first cell array and communicating with a memory controller through a first path, a second channel including a second cell array and communicating with the memory controller through a second path, and an assignment control circuit configured to monitor memory usage of the first and second channels and further assign a storage space of a portion of the second cell array to the first channel when the memory usage of the first cell array exceeds a threshold value. Access to the storage space of the portion of the second cell array assigned to the first channel is performed through the first path.

公开(公告)号：US11010316B2

公开(公告)日：2021-05-18

申请号：US16115089

申请日：2018-08-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Won Park ,  Je-Min Ryu ,  Sang-Hoon Shin ,  Jae-Hoon Jung

IPC: G06F13/16 ,  G06F12/06 ,  G06F12/0866

Abstract: A memory device includes a first channel including a first cell array and communicating with a memory controller through a first path, a second channel including a second cell array and communicating with the memory controller through a second path, and an assignment control circuit configured to monitor memory usage of the first and second channels and further assign a storage space of a portion of the second cell array to the first channel when the memory usage of the first cell array exceeds a threshold value. Access to the storage space of the portion of the second cell array assigned to the first channel is performed through the first path.

公开(公告)号：US11836097B2

公开(公告)日：2023-12-05

申请号：US17229198

申请日：2021-04-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Won Park ,  Je-Min Ryu ,  Sang-Hoon Shin ,  Jae-Hoon Jung

IPC: G06F13/16 ,  G06F12/06 ,  G06F12/0866

CPC classification number: G06F13/1673 ,  G06F12/0607 ,  G06F12/0866 ,  G06F2212/601

Abstract: A memory device includes a first channel including a first cell array and communicating with a memory controller through a first path, a second channel including a second cell array and communicating with the memory controller through a second path, and an assignment control circuit configured to monitor memory usage of the first and second channels and further assign a storage space of a portion of the second cell array to the first channel when the memory usage of the first cell array exceeds a threshold value. Access to the storage space of the portion of the second cell array assigned to the first channel is performed through the first path.

公开(公告)号：US09280663B2

公开(公告)日：2016-03-08

申请号：US13713381

申请日：2012-12-13

Applicant: Samsung Electronics Co. Ltd.

Inventor： Michael Pak ,  Kyung-Hee Lee ,  Na-Hea-Sal Kim ,  Jae-Hoon Jung

IPC: G06F21/56 ,  H04W12/12 ,  H04L29/06

CPC classification number: G06F21/56 ,  G06F21/562 ,  G06F21/567 ,  H04L63/145 ,  H04W12/12

Abstract: An apparatus and method for analyzing malware in a data analysis system are provided. The apparatus includes a data analysis unit and a controller. The data analysis unit sorts data into primary harmful data and primary harmless data using screening data information of malicious code information and virus information. The controller screens or deletes the primary harmful data, and sends a request for precision analysis of the primary harmless data to a server. The data analysis unit sorts secondary harmful data from the primary harmless data using the precision analysis result received from the server.

Abstract translation: 提供了一种用于在数据分析系统中分析恶意软件的装置和方法。 该装置包括数据分析单元和控制器。 数据分析单元使用恶意代码信息和病毒信息的筛选数据信息将数据分类为主要有害数据和主要无害数据。 控制器屏蔽或删除主要有害数据，并向主服务器发送主要无害数据的精确分析请求。 数据分析单元使用从服务器接收到的精度分析结果对主要无害数据中的次要有害数据进行排序。

公开(公告)号：US20230376217A1

公开(公告)日：2023-11-23

申请号：US18196041

申请日：2023-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chon Yong LEE ,  Kyunghan Lee ,  Seongsik Hwang ,  Kyung-Chang Ryoo ,  Jae-Hoon Jung

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0656 ,  G06F3/0673

Abstract: A memory device is provided. The memory device includes: a buffer memory; and a memory controller configured to: obtain map data and meta data for recovering the map data from at least one external storage device; store the map data and the meta data obtained from the at least one external storage device in the buffer memory, the buffer memory being allocated for the at least one external storage device; translate a logical address corresponding to the at least one external storage device into a physical address of the buffer memory; and send the map data and the meta data to the at least one external storage device in response to detecting a sudden power-off event.