Invention Grant
- Patent Title: Semiconductor memory devices with electrically isolated stacked bit lines and methods of manufacture
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Application No.: US17383726Application Date: 2021-07-23
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Publication No.: US11849655B2Publication Date: 2023-12-19
- Inventor: Tung Ying Lee , Shao-Ming Yu , Kai-Tai Chang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H10N70/00
- IPC: H10N70/00 ; H10B63/00

Abstract:
A semiconductor device includes a memory structure over a substrate, wherein the memory structure includes a first word line; a first bit line over the first word line; a second bit line over the first bit line; a memory material over sidewalls of the first bit line and the second bit line; a first control word line along a first side of the memory material, wherein the first control word line is electrically connected to the first word line; a second control word line along a second side of the memory material that is opposite the first side; and a second word line over the second bit line, the first control word line, and the second control word line, wherein the second word line is electrically connected to the second control word line.
Public/Granted literature
- US20220336742A1 Semiconductor Memory Devices and Methods of Manufacture Public/Granted day:2022-10-20
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