Invention Grant
- Patent Title: Semiconductor die connection system and method
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Application No.: US17837492Application Date: 2022-06-10
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Publication No.: US11855029B2Publication Date: 2023-12-26
- Inventor: Ming-Fa Chen , Chen-Hua Yu , Sen-Bor Jan
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater Matsil, LLP
- The original application number of the division: US16715600 2019.12.16
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/065 ; H01L25/00 ; H01L21/768 ; H01L21/56 ; H01L21/784 ; H01L23/538 ; H01L23/48 ; H01L21/78 ; H01L23/31 ; H01L25/18

Abstract:
A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.
Public/Granted literature
- US20220302062A1 Semiconductor Die Connection System and Method Public/Granted day:2022-09-22
Information query
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