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公开(公告)号:US20250167173A1
公开(公告)日:2025-05-22
申请号:US19027450
申请日:2025-01-17
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Fa Chen , Chen-Hua Yu
IPC: H01L25/065 , H01L23/00 , H01L23/367 , H01L23/467 , H01L23/473 , H01L23/48 , H01L23/498 , H01L23/538 , H01L25/00
Abstract: A method includes bonding a first device die and a second device die to a substrate, and filling a gap between the first device die and the second device die with a gap-filling material. A top portion of the gap-filling material covers the first device die and the second device die. Vias are formed to penetrate through the top portion of the gap-filling material. The vias are electrically coupled to the first device die and the second device die. The method further includes forming redistribution lines over the gap-filling material using damascene processes, and forming electrical connectors over and electrically coupling to the redistribution lines.
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公开(公告)号:US20250164714A1
公开(公告)日:2025-05-22
申请号:US18605429
申请日:2024-03-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Fa Chen
IPC: G02B6/42
Abstract: Optical devices and methods of manufacture are presented in which a first connecting structure with a lens is utilized to transmit and receive optical signals to and from an optical device. In embodiments the first connecting structure comprises a first mirror and a lens aligned with the first mirror. The first mirror and the lens redirect optical signals into and out of the optical devices through an edge coupler within the optical device.
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公开(公告)号:US12288802B2
公开(公告)日:2025-04-29
申请号:US18654658
申请日:2024-05-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Wei Chen , Ying-Ju Chen , Jie Chen , Ming-Fa Chen
IPC: H01L23/522 , H01G4/30 , H01L21/768 , H01L49/02
Abstract: Methods of forming a super high density metal-insulator-metal (SHDMIM) capacitor and semiconductor device are disclosed herein. A method includes depositing a first insulating layer over a semiconductor substrate and a series of conductive layers separated by a series of dielectric layers over the first insulating layer, the series of conductive layers including device electrodes and dummy metal plates. A first set of contact plugs through the series of conductive layers contacts one or more conductive layers of a first portion of the series of conductive layers. A second set of contact plugs through the series of dielectric layers avoids contact of a second portion of the series of conductive layers, the second portion of the series of conductive layers electrically floating.
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公开(公告)号:US12266584B2
公开(公告)日:2025-04-01
申请号:US18363363
申请日:2023-08-01
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Wei Chen , Ming-Fa Chen , Sung-Feng Yeh
IPC: H01L23/36 , H01L21/56 , H01L23/31 , H01L25/065 , H01L27/06
Abstract: In an embodiment, a device includes: an interposer; a first integrated circuit device attached to the interposer; a second integrated circuit device attached to the interposer adjacent the first integrated circuit device; a heat dissipation die on the second integrated circuit device; and an encapsulant around the heat dissipation die, the second integrated circuit device, and the first integrated circuit device, a top surface of the encapsulant being coplanar with a top surface of the heat dissipation die and a top surface of the first integrated circuit device.
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公开(公告)号:US20250093593A1
公开(公告)日:2025-03-20
申请号:US18403531
申请日:2024-01-03
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wen-Chih Lin , Cheng-Yu Kuo , Yen-Hung Chen , Hsuan-Ting Kuo , Chia-Shen Cheng , Chao-Wei Li , Ching-Hua Hsieh , Wen-Chih Chiou , Ming-Fa Chen , Shang-Yun Hou
IPC: G02B6/42
Abstract: Optical devices and methods of manufacture are presented in which a mirror structure is utilized to transmit and receive optical signals to and from an optical device. In embodiments the mirror structure receives optical signals from outside of an optical device and directs the optical signals through at least one mirror to an optical component of the optical device.
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公开(公告)号:US12243830B2
公开(公告)日:2025-03-04
申请号:US17870104
申请日:2022-07-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Wei Chen , Ming-Fa Chen
IPC: H01L23/538 , H01L21/48 , H01L21/56 , H01L21/683 , H01L21/78 , H01L23/00 , H01L23/31 , H01L25/00 , H01L25/10
Abstract: A semiconductor device and method of manufacture are provided wherein semiconductor devices are attached over a semiconductor substrate. An opening is formed within metallization layers over the semiconductor substrate and the semiconductor substrate, and an encapsulant is placed to fill the opening. Once the encapsulant is placed, the semiconductor substrate is singulated to separate the devices. By recessing the material of the metallization layers and forming the opening, delamination damage may be reduced or eliminated.
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公开(公告)号:US12218093B2
公开(公告)日:2025-02-04
申请号:US18332990
申请日:2023-06-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Fa Chen , Chen-Hua Yu , Sen-Bor Jan
IPC: H01L23/00 , H01L21/56 , H01L21/768 , H01L21/78 , H01L21/784 , H01L23/31 , H01L23/48 , H01L23/538 , H01L25/00 , H01L25/065 , H01L25/18
Abstract: A system and method for connecting semiconductor dies is provided. An embodiment comprises connecting a first semiconductor die with a first width to a second semiconductor die with a larger second width and that is still connected to a semiconductor wafer. The first semiconductor die is encapsulated after it is connected, and the encapsulant and first semiconductor die are thinned to expose a through substrate via within the first semiconductor die. The second semiconductor die is singulated from the semiconductor wafer, and the combined first semiconductor die and second semiconductor die are then connected to another substrate.
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公开(公告)号:US20240395752A1
公开(公告)日:2024-11-28
申请号:US18791012
申请日:2024-07-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Wei Chen , Jie Chen , Ming-Fa Chen
IPC: H01L23/00 , H01L21/18 , H01L21/768 , H01L23/373 , H01L23/48 , H01L23/532 , H01L33/00
Abstract: A device includes an interconnect structure over a substrate, multiple first conductive pads over and connected to the interconnect structure, a planarization stop layer extending over the sidewalls and top surfaces of the first conductive pads of the multiple first conductive pads, a surface dielectric layer extending over the planarization stop layer, and multiple first bonding pads within the surface dielectric layer and connected to the multiple first conductive pads.
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公开(公告)号:US20240387468A1
公开(公告)日:2024-11-21
申请号:US18786482
申请日:2024-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Wei Chen , Ming-Fa Chen
IPC: H01L25/065 , H01L23/00 , H01L25/00
Abstract: Packages and methods of fabricating the same are provided. The package includes a first die, wherein the first die includes a plurality of through vias from a first surface of the first die toward a second surface of the first die; a second die disposed below the first die, wherein the second surface of the first die is bonded to the second die; an isolation layer disposed in the first die, wherein the plurality of through vias extend through the isolation layer; an encapsulation laterally surrounding the first die, wherein the encapsulation is laterally separated from the isolation layer; a buffer layer disposed over the first die, the isolation layer, and the encapsulation; and a plurality of conductive terminals disposed over the isolation layer, wherein the plurality of conductive terminals is electrically connected to corresponding ones of the plurality of through vias.
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10.
公开(公告)号:US12148664B2
公开(公告)日:2024-11-19
申请号:US17874741
申请日:2022-07-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ming-Fa Chen , Tzuan-Horng Liu , Chao-Wen Shih
IPC: H01L21/768 , H01L21/3065 , H01L23/00 , H01L25/00 , H01L25/065
Abstract: An embodiment is a method including forming a first interconnect structure over a first substrate, the first interconnect structure comprising dielectric layers and metallization patterns therein, patterning the first interconnect structure to form a first opening, coating the first opening with a barrier layer, etching a second opening through the barrier layer and the exposed portion of the first substrate, depositing a liner in the first opening and the second opening, filling the first opening and the second opening with a conductive material, and thinning the first substrate to expose a portion of the conductive material in the second opening, the conductive material extending through the first interconnect structure and the first substrate forming a through substrate via.
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