发明授权
- 专利标题: Analog to digital conversion apparatus and method having quick conversion mechanism
-
申请号: US17670536申请日: 2022-02-14
-
公开(公告)号: US11876526B2公开(公告)日: 2024-01-16
- 发明人: Shih-Hsiung Huang , Kai-Yue Lin , Wei-Jyun Wang , Sheng-Yen Shih
- 申请人: REALTEK SEMICONDUCTOR CORPORATION
- 申请人地址: TW Hsinchu
- 专利权人: REALTEK SEMICONDUCTOR CORPORATION
- 当前专利权人: REALTEK SEMICONDUCTOR CORPORATION
- 当前专利权人地址: TW Hsinchu
- 代理机构: WPAT, P.C.
- 优先权: TW 0113649 2021.04.15
- 主分类号: H03M1/06
- IPC分类号: H03M1/06 ; H03M1/08
摘要:
The present invention discloses an analog to digital conversion (ADC) apparatus having quick conversion mechanism. Each of ADC circuits receives a previous higher-bit conversion result to perform prediction to generate a current higher-bit conversion result, performs conversion on an input analog signal according to a sampling clock that has a frequency at least twice of the frequency of the input analog signal based on a successive-approximation mechanism to generate a current lower-bit conversion result, and combines the current higher-bits and current lower-bit conversion results to generate a current conversion result and output a remained signal amount as a residue. A noise-shaping circuit performs calculation based on the residue to generate a noise-shaping reference signal. Each of the ADC circuits combines the current conversion result and the noise-shaping reference signal to generate an output digital signal.
公开/授权文献
信息查询