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公开(公告)号：US20230137324A1
公开(公告)日：2023-05-04
申请号：US17865720
申请日：2022-07-15
发明人： I-HAO CHIANG
IPC分类号： G11C15/04
摘要： A content addressable memory cell includes storage circuits and a comparator circuit. A first storage circuit of the storage circuits is configured to store data, and a second storage circuit of the storage circuits is configured to store a state bit. The comparator circuit is configured to determine whether to adjust a level of a match line to a level of one of the data and the state bit in response to levels of search bit lines and another one of the data and the state bit.
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公开(公告)号：US20230136927A1
公开(公告)日：2023-05-04
申请号：US17973706
申请日：2022-10-26
发明人： YAO-CHIA LIU , YUAN-SHENG LEE
IPC分类号： H03K5/135 , H03K5/15 , H03K19/173
摘要： A quadrant alternate switching phase interpolator includes first and second multiplexer circuits, a phase interpolator circuitry, and a controller circuitry. The first multiplexer circuit outputs one of first and second clock signals to be a first signal in response to first and third bits in a quadrant control code. The second multiplexer circuit outputs one of third and fourth clock signals to be a second signal in response to second and fourth bits in the quadrant control code, and the first, the third, the second, and fourth clock signals are sequentially different in phase by 90 degrees. The phase interpolator circuitry generates an output clock signal in response to the first and the second signals and phase control bits. The controller circuitry performs a bit-shift operation on the phase control bits to adjust a phase of the output clock signal.
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公开(公告)号：US20230135496A1
公开(公告)日：2023-05-04
申请号：US18048201
申请日：2022-10-20
发明人： CHIA HAN LIN , MENG AN KUO , ZONG-DA HUANG
IPC分类号： G01R31/28
摘要： A test method is configured to test a chip on a circuit under test, wherein the circuit under test further includes a DC-DC converter. The test method includes the operations of: generating a test pulse signal; filtering the test pulse signal to generate a first test DC voltage to the DC-DC converter, wherein the DC-DC converter transforms the first test DC voltage to a second test DC voltage and transmits the second test DC voltage to the chip; and extracting an output signal of the chip to determine a performance of the chip, wherein the chip generates the output signal according to the second test DC voltage.
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公开(公告)号：US11631517B2
公开(公告)日：2023-04-18
申请号：US16155058
申请日：2018-10-09
发明人： Hsiao-Tsung Yen , Yuh-Sheng Jean , Ta-Hsun Yeh
摘要： An 8-shaped inductive coil device that includes a first and a second spiral coils and a connection segment structure is provided. The first spiral coil includes first metal segments and crossing connection segments disposed at a first and a second metal layers respectively and includes first connection terminals. The second spiral coil includes second connection terminals. The connection segment structure electrically couples the first and the second connection terminals. The first and the second spiral coils are disposed along an imaginary line passing through a central region of each of ranges surrounded by the first and the second spiral coils. The connection segment structure and the crossing connection segments electrically couple the part of the first metal segments substantially vertical to the imaginary line, and the connection segment structure and the crossing connection segments are disposed substantially on the imaginary line.
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5.发明申请公开(公告)号：US20230115471A1
公开(公告)日：2023-04-13
申请号：US17857621
申请日：2022-07-05
发明人： SHIH-HSIUNG HUANG , WEI-CIAN HONG , SHENG-YEN SHIH
摘要： A successive approximation register analog to digital converter includes a charge injection digital to analog converter (DAC) circuit, a comparator circuit, and a control logic circuitry. The charge injection DAC circuit includes capacitors that sample input signals to generate first and second signals and charge injection circuits that selectively adjust the first or the second signals according to enable signals and decision signals. The comparator circuit compares the first and second signals to generate the decision signals. The control logic circuitry controls a circuit of the charge injection circuits to adjust the first and the second signals during an initial phase, in order to adjust a switching sequence of the circuit according to the decision signals corresponding to the initial phase, and generates the enable signals according to the decision signals and the adjusted switching sequence during a conversion phase to generate a digital output.
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公开(公告)号：US20230102504A1
公开(公告)日：2023-03-30
申请号：US17950576
申请日：2022-09-22
发明人： LIANG-HUI LI , YU-CHANG CHEN , MING-CHIH KUAN
摘要： A photoplethysmography front-end receiver is capable of eliminating an error in the estimation of an ambient-light current. The receiver includes a current-to-voltage conversion circuit, an integrator, a switch circuit, and an analog-to-digital converter (ADC). The current-to-voltage conversion circuit converts an input current into a differential voltage signal. The integrator receives the differential voltage signal and outputs an analog output voltage. The switch circuit is set between the current-to-voltage conversion circuit and the integrator, forwards the differential voltage signal to the integrator in a first duration when a controllable light source is turned on, and forwards an inverted signal of the differential voltage signal to the integrator in a second duration when the controllable light source is turned off, wherein the second duration is after or before the first duration. The ADC generates a digital signal for analysis according to the analog output voltage after the second duration.
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公开(公告)号：US11616530B2
公开(公告)日：2023-03-28
申请号：US17370049
申请日：2021-07-08
发明人： Hsuan-Ting Ho , Liang-Wei Huang , Kuei-Ying Lu , Chia-Lin Chang
摘要： An echo canceller system includes a data transmitter circuit and an echo canceller circuit. The data transmitter circuit is configured to receive a transmitted signal. The echo canceller circuit includes a first filter. The first filter is configured to generate a first filtered signal according to the transmitted signal and a filter coefficient vector. The filter coefficient vector is updated according to a high-frequency leakage process. The echo canceller circuit is further configured to generate an echo cancelling signal according to the first filtered signal. The data transmitter circuit is further configured to generate an output signal according to a received signal and the echo cancelling signal.
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公开(公告)号：US20230091800A1
公开(公告)日：2023-03-23
申请号：US17828516
申请日：2022-05-31
发明人： SHIH-HSIUNG HUANG
IPC分类号： H03K17/06 , H03K19/017 , H03K17/0412
摘要： A bootstrapped switch includes a first transistor, a second transistor, a first capacitor, three switches, and a switch circuit. The switch circuit includes a first switch, a second switch, a second capacitor, and a resistor. The first transistor receives the input voltage and outputs the output voltage. The first terminal of the second transistor receives the input voltage, and the second terminal of the second transistor is coupled to the first terminal of the first capacitor. The control terminal of the first switch receives a clock. The second switch is coupled between the control terminal of the first transistor and the first switch. The second capacitor is coupled between the control terminal of the first switch and the control terminal of the second switch. The resistor is coupled between the control terminal of the second switch and a reference voltage.
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公开(公告)号：US20230090107A1
公开(公告)日：2023-03-23
申请号：US17689585
申请日：2022-03-08
发明人： LI CHENG CHU
IPC分类号： H03K17/082 , H02H1/00 , H03K5/24
摘要： A switch control circuit includes a power switch, a first protection unit, and a second protection unit. The power switch has a first terminal coupled to a first voltage terminal for receiving a first voltage, a second terminal coupled to a second voltage terminal for receiving a second voltage, and a control terminal receives a control voltage. In a first mode, the control voltage is greater than the first voltage. In a second mode, when a voltage of the second voltage terminal is smaller than a first reference voltage, the first protection unit pulls down the control voltage to reduce a current flowing through the power switch. When the voltage of the second voltage terminal is smaller than the second reference voltage, the second protection unit pulls down the control voltage to a ground voltage.
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公开(公告)号：US11612007B2
公开(公告)日：2023-03-21
申请号：US17193355
申请日：2021-03-05
发明人： Yong Liu , Yang Huang , Yi-Fan Zhang
摘要： The present invention discloses a low power dissipation Bluetooth mesh network system and a communication method thereof. The Bluetooth mesh network system includes a friend node and a lower power node. The friend node operates as a proxy server terminal to perform a proxy server broadcast. The lower power node operates as a proxy client and establishes a connection with the friend node based on a proxy protocol when the proxy server broadcast is received and identified. The friend node further filters out an invalid packet unrelated to the low power node and stores a valid packet related to the low power node so as to transmit the valid packet to the low power node when the low power node switches from a sleep status to a wakeup status.
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