- 专利标题: Dual-precision analog memory cell and array
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申请号: US18082005申请日: 2022-12-15
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公开(公告)号: US11887645B2公开(公告)日: 2024-01-30
- 发明人: Zhichao Lu , Liang Zhao
- 申请人: HEFEI RELIANCE MEMORY LIMITED
- 申请人地址: CN Hefei
- 专利权人: Hefei Reliance Memory Limited
- 当前专利权人: Hefei Reliance Memory Limited
- 当前专利权人地址: CN Hefei
- 代理机构: Sheppard Mullin Richter & Hampton LLP
- 主分类号: G11C14/00
- IPC分类号: G11C14/00 ; G11C11/22 ; G06N5/04 ; G11C11/56 ; G06N3/06 ; G11C11/4074
摘要:
Dual-precision analog memory cells and arrays are provided. In some embodiments, a memory cell, comprises a non-volatile memory element having an input terminal and at least one output terminal; and a volatile memory element having a plurality of input terminals and an output terminal, wherein the output terminal of the volatile memory element is coupled to the input terminal of the non-volatile memory element, and wherein the volatile memory element comprises: a first transistor coupled between a first supply and a common node, and a second transistor coupled between a second supply and the common node; wherein the common node is coupled to the output terminal of the volatile memory element; and wherein gates of the first and second transistors are coupled to respective ones of the plurality of input terminals of the volatile memory element.
公开/授权文献
- US20230118667A1 DUAL-PRECISION ANALOG MEMORY CELL AND ARRAY 公开/授权日:2023-04-20
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