Invention Grant
- Patent Title: Encapsulated vertical interconnects for high-speed applications and methods of assembling same
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Application No.: US17218384Application Date: 2021-03-31
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Publication No.: US11887917B2Publication Date: 2024-01-30
- Inventor: Bok Eng Cheah , Jackson Chung Peng Kong , Kooi Chi Ooi , Yang Liang Poh
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Akona IP PC
- Priority: MY 18701318 2018.03.30
- The original application number of the division: US16279656 2019.02.19
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/00
Abstract:
A semiconductor package substrate includes an encapsulated interconnect on a land side of the substrate. The encapsulated interconnect includes an integral metallic structure that has a smaller contact end against the semiconductor package substrate, and a larger contact end for board mounting.
Public/Granted literature
- US20210217689A1 ENCAPSULATED VERTICAL INTERCONNECTS FOR HIGH-SPEED APPLICATIONS AND METHODS OF ASSEMBLING SAME Public/Granted day:2021-07-15
Information query
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