EP cycling dependent asymmetric/symmetric VPASS conversion in non-volatile memory structures
Abstract:
A method for programming a target memory cell of a memory array of a non-volatile memory system, the method comprises determining a total number of erase/programming (EP) cycles that were applied previously to the memory cell and, (1) if the determined total number of cycles does not exceed a threshold value, applying an asymmetric programming scheme, and, (2) if the determined total number of cycles exceeds the threshold value, applying a symmetric programming scheme. Further, a magnitude of a boosting voltage bias (VPASS) that is to be applied to an unselected word line may be determined according to the determined total number of erase/programming (EP) cycles.
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