- 专利标题： Semiconductor arrangement and method of manufacture
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申请号： US18106001申请日： 2023-02-06
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公开(公告)号： US11894425B2公开(公告)日： 2024-02-06
- 发明人: Yun-Chi Wu , Tsung-Yu Yang , Cheng-Bo Shu , Chien Hung Liu
- 申请人： Taiwan Semiconductor Manufacturing Company Limited
- 申请人地址： TW Hsin-Chu
- 专利权人： Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人： Taiwan Semiconductor Manufacturing Company Limited
- 当前专利权人地址： TW Hsin-Chu
- 代理机构： COOPER LEGAL GROUP, LLC
- 主分类号： H01L29/08
- IPC分类号： H01L29/08 ; H01L29/40 ; H01L21/3213 ; H01L21/265 ; H01L21/266 ; H01L21/311 ; H01L29/66 ; H01L21/027 ; H01L21/8238 ; H01L29/78 ; H01L27/092 ; H01L21/02 ; H10B10/00
摘要：
A method of forming a semiconductor arrangement includes forming a gate dielectric layer over a semiconductor layer. A gate electrode layer is formed over the gate dielectric layer. A first gate mask is formed over the gate electrode layer. The gate electrode layer is etched using the first gate mask as an etch template to form a first gate electrode. A first dopant is implanted into the semiconductor layer using the first gate mask and the first gate electrode as an implantation template to form a first doped region in the semiconductor layer.
公开/授权文献
- US20230187499A1 SEMICONDUCTOR ARRANGEMENT AND METHOD OF MANUFACTURE 公开/授权日：2023-06-15
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