- 专利标题: Method and apparatus for providing C-PHY interface via FPGA IO interface
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申请号: US17746563申请日: 2022-05-17
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公开(公告)号: US11899608B2公开(公告)日: 2024-02-13
- 发明人: Grant Thomas Jennings
- 申请人: GOWIN Semiconductor Corporation
- 申请人地址: CN GuangZhou
- 专利权人: GOWIN Semiconductor Corporation Ltd.
- 当前专利权人: GOWIN Semiconductor Corporation Ltd.
- 当前专利权人地址: CN GuangZhou
- 代理机构: JW Law Group
- 代理商 James M. Wu
- 主分类号: G06F13/36
- IPC分类号: G06F13/36 ; G06F13/40 ; G06F13/42 ; G06F13/38
摘要:
A method and/or process of interface bridging device for providing a C physical layer (“C-PHY”) input output interface via a field programmable gate arrays (“FPGA”) is disclosed. The process, in one aspect, is capable of coupling a first wire of data lane 0 to a first terminal of first IO serializer of FPGA for receiving first data from a D-PHY transmitter of a first device and coupling a second wire of the data lane 0 to a second terminal of the first IO serializer of FPGA for receiving second data from the D-PHY transmitter. Upon activating a first scalable low-voltage signal to generate a first value on P channel and a second value on N channel in response to the first data and the second data, a first signal on first wire of trio 0 for a C-PHY output is generated based on the first value on the P channel.
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