Invention Grant
- Patent Title: Fine feature formation techniques for printed circuit boards
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Application No.: US17383084Application Date: 2021-07-22
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Publication No.: US11903138B2Publication Date: 2024-02-13
- Inventor: Eric Li , Kemal Aygun , Kai Xiao , Gong Ouyang , Zhichao Zhang
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: KDW Firm PLLC
- Main IPC: H05K1/02
- IPC: H05K1/02 ; H05K1/16 ; H05K3/00 ; H05K3/02 ; H05K3/46

Abstract:
Fine feature formation techniques for printed circuit boards are described. In one embodiment, for example, a method may comprise fabricating a conductive structure on a low density interconnect (LDI) printed circuit board (PCB) according to an LDI fabrication process and forming one or more fine conductive features on the LDI PCB by performing a fine feature formation (FFF) process, the FFF process to comprise removing conductive material of the conductive structure along an excision path to form a fine gap region within the conductive structure. Other embodiments are described and claimed.
Public/Granted literature
- US20210352807A1 FINE FEATURE FORMATION TECHNIQUES FOR PRINTED CIRCUIT BOARDS Public/Granted day:2021-11-11
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