A semiconductor memory device includes a first word line formed over a first active region. In some embodiments, a first metal line is disposed over and perpendicular to the first word line, where the first metal line is electrically connected to the first word line using a first conductive via, and where the first conductive via is disposed over the first active region. In some examples, the semiconductor memory device further includes a second metal line and a third metal line both parallel to the first metal line and disposed on opposing sides of the first metal line, where the second metal line is electrically connected to a source/drain region of the first active region using a second conductive via, and where the third metal line is electrically connected to the source/drain region of the first active region using a third conductive via.