- Patent Title: Co-packaging with silicon photonics hybrid planar lightwave circuit
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Application No.: US17992670Application Date: 2022-11-22
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Publication No.: US11982854B2Publication Date: 2024-05-14
- Inventor: Sang Yup Kim , Myung Jin Yim , Woosung Kim
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Akona IP PC
- Main IPC: G02B6/43
- IPC: G02B6/43 ; G02B6/122 ; G02B6/42 ; G02B6/12

Abstract:
An interposer apparatus for co-packaging an electronic integrated circuit and a photonic integrated circuit may include a dielectric substrate; an optical waveguide disposed on the dielectric substrate to optically couple the photonic integrated circuit disposed on one side of the dielectric substrate with at least one of another photonic integrated circuit disposed on the dielectric substrate or an optical device disposed on the dielectric substrate; and a metal interconnect disposed through the dielectric substrate to electrically couple the photonic integrated circuit disposed on the one side of the dielectric substrate with an electronic integrated circuit disposed on the other side of the dielectric substrate.
Public/Granted literature
- US20230091428A1 CO-PACKAGING WITH SILICON PHOTONICS HYBRID PLANAR LIGHTWAVE CIRCUIT Public/Granted day:2023-03-23
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