Invention Grant
- Patent Title: Gate contact and via structures in semiconductor devices
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Application No.: US17470548Application Date: 2021-09-09
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Publication No.: US12002885B2Publication Date: 2024-06-04
- Inventor: Chung-Liang Cheng , Sheng-Tsung Wang , Huang-Lin Chao
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Sterne, Kessler, Goldstein & Fox P.L.L.C.
- Main IPC: H01L29/78
- IPC: H01L29/78 ; B82Y10/00 ; H01L21/285 ; H01L21/768 ; H01L21/8234 ; H01L23/48 ; H01L23/485 ; H01L23/522 ; H01L27/088 ; H01L29/06 ; H01L29/08 ; H01L29/66 ; H01L29/775

Abstract:
A semiconductor device and methods of fabricating the same are disclosed. The semiconductor device includes a substrate, a fin structure disposed on the substrate, a source/drain (S/D) region disposed on the fin structure, and a gate structure disposed on the fin structure adjacent to the S/D region. The gate structure includes a gate stack disposed on the fin structure and a gate capping structure disposed on the gate stack. The gate capping structure includes a conductive gate cap disposed on the gate stack and an insulating gate cap disposed on the conductive gate cap. The semiconductor device further includes a first contact structure disposed within the gate capping structure and a first via structure disposed on the first contact structure.
Public/Granted literature
- US20220254927A1 GATE CONTACT AND VIA STRUCTURES IN SEMICONDUCTOR DEVICES Public/Granted day:2022-08-11
Information query
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