Invention Grant
- Patent Title: Strain-induced shift mitigation in semiconductor packages
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Application No.: US17822960Application Date: 2022-08-29
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Publication No.: US12068261B2Publication Date: 2024-08-20
- Inventor: Gregory Thomas Ostrowicki , Amit Sureshkumar Nangia
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Yudong Kim; Frank D. Cimino
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L21/56 ; H01L23/31 ; H01L23/64

Abstract:
A semiconductor package includes a semiconductor die including a semiconductor substrate, a strain-sensitive component located within or over a metallization layer of the semiconductor die, wherein a parameter of the strain-sensitive component exhibits a longitudinal shift due to a longitudinal strain and a transverse shift due to a transverse strain, and a mold compound covering the semiconductor die and the strain-sensitive component. The semiconductor package, including the semiconductor die and the mold compound, defines an orthogonal package-induced strain ratio on the strain-sensitive component on the semiconductor die surface. The strain-sensitive component is located such that the longitudinal shift due to package-induced strains offsets the transverse shift due to the package-induced strains.
Public/Granted literature
- US20220415824A1 STRAIN-INDUCED SHIFT MITIGATION IN SEMICONDUCTOR PACKAGES Public/Granted day:2022-12-29
Information query
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