- 专利标题: Gate structures in transistors and method of forming same
-
申请号: US17325736申请日: 2021-05-20
-
公开(公告)号: US12087587B2公开(公告)日: 2024-09-10
- 发明人: Hsin-Yi Lee , Cheng-Lung Hung , Chi On Chui
- 申请人: Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址: TW Hsinchu
- 专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址: TW Hsinchu
- 代理机构: Slater Matsil, LLP
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/02 ; H01L21/285 ; H01L21/3115 ; H01L21/8238 ; H01L27/092 ; H01L29/06 ; H01L29/417 ; H01L29/423 ; H01L29/45 ; H01L29/49 ; H01L29/66 ; H01L29/786
摘要:
In some embodiments, a method includes forming a plurality of nanostructures over a substrate; etching the plurality of nanostructures to form first recesses; forming source/drain regions in the first recesses; removing first nanostructures of the plurality of nanostructures leaving second nanostructures of the plurality of nanostructures; depositing a gate dielectric over and around the second nanostructures; performing an aluminum treatment on the gate dielectric; depositing a first conductive material over and around the gate dielectric; performing a fluorine treatment on the first conductive material; and depositing a second conductive material over and around the first conductive material.
公开/授权文献
信息查询
IPC分类: