Invention Grant
- Patent Title: Gap fill dielectrics for electrical isolation of transistor structures in the manufacture of integrated circuits
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Application No.: US17127860Application Date: 2020-12-18
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Publication No.: US12087614B2Publication Date: 2024-09-10
- Inventor: Michael Makowski , Sudipto Naskar , Ryan Pearce , Nita Chandrasekhar , Minyoung Lee , Christopher Parker
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L21/02 ; H01L21/762 ; H01L29/66 ; H01L29/78

Abstract:
Transistors structures comprising a semiconductor features and dielectric material comprising silicon and oxygen in gaps or spaces between the features. The dielectric material may fill the gaps from bottom-up with an atomic layer deposition (ALD) process that includes a silicon deposition phase, and an oxidation phase augmented by N2:NH3 plasma activated nitrogen species. Being plasma activated, the nitrogen species have short mean free paths, and therefore preferentially passivate surfaces with low aspect ratios. This aspect-ratio dependent passivation may increase an energy barrier to surface reactions with a silicon precursor, resulting in a concomitant differential in deposition rate. With N2:NH3 plasma passivation, deposited dielectric material may have a nitrogen concentration that varies by at least order of magnitude as a function of the aspect ratio of the filled gaps.
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