- 专利标题： Inner spacer features for multi-gate transistors
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申请号： US18336788申请日： 2023-06-16
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公开(公告)号： US12087842B2公开(公告)日： 2024-09-10
- 发明人: Bone-Fong Wu , Chih-Hao Yu , Chia-Pin Lin
- 申请人： Taiwan Semiconductor Manufacturing Co., Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- 当前专利权人地址： TW Hsinchu
- 代理机构： HAYNES AND BOONE, LLP
- 主分类号： H01L29/66
- IPC分类号： H01L29/66 ; H01L29/06 ; H01L29/423 ; H01L29/78 ; H01L21/02
摘要：
A semiconductor device according to the present disclosure includes a channel member including a first connection portion, a second connection portion and a channel portion disposed between the first connection portion and the second connection portion, a first inner spacer feature disposed over and in contact with the first connection portion, a second inner spacer feature disposed under and in contact with the first connection portion, and a gate structure wrapping around the channel portion of the channel member. The channel member further includes a first ridge on a top surface of the channel member and disposed at an interface between the channel portion and the first connection portion. The first ridge partially extends between the first inner spacer feature and the gate structure.
公开/授权文献
- US20230335620A1 INNER SPACER FEATURES FOR MULTI-GATE TRANSISTORS 公开/授权日：2023-10-19
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